Processor
Event-driven multi-core Neuromorphic processor modelling and micro- architecture/system design exploration.
What you will doAt IMEC's Hardware Efficient AI lab at Holst-Center High-Tech Campus Eindhoven, we are a group that is driving advanced exploration for next-generation neuromorphic accelerators that target always-on low-power Edge-AI applications. We are seeking highly motivated MSc/PhD students to push the limits of our recent scalable neuromorphic platform (Seneca). Specifically, we are interested in the innovations in micro-architecture and platform (SoC) design of Seneca that is scalable to 100s and 1000s of cores. This assignment focuses on building a simulation platform for Seneca and exploring its bottlenecks at a system (SoC) level.
As an intern in the Hardware Efficient AI lab, you will join a team that is architecting Seneca. Your goal is to architect a highly scalable simulator that can simulate 1000s of Seneca core.
What we do for youAs the world-best research institute, we are the center of the excellence in nano-electronics design for Internet of Things and Healthcare applications. In this internship project, you will be working on a cutting-edge research project, under the supervision of the world-renown researchers from diverse background..
Who you areTo be considered for this position: The European candidates must be enrolled in a Master program. Non- European master students who are enrolled in a Dutch university are also welcomed to apply
InterestedDoes this position sound like an interesting next step in your career at imec? Don't hesitate to submit your application by clicking on ‘APPLY NOW'.