28.12.2022, Studentische Hilfskräfte, Praktikantenstellen, Studienarbeiten
The task is the implementation of a serial interface for setting bit in custom RRAM ASIC using Cadence Virtuoso.
This includes:
Selection of an appropriate serial data transfer protocol Implementation and simulation on schematic level Development of a testbench for the interface
With sufficient interest, the topic can also be expanded to a master thesis Die Arbeit kann in Deutsch oder Englisch betreut werden
Contact Stefan Pechmann Technical University of Munich, Chair of Micro- and Nanosystems Technology E-Mail: stefan.pechmann@tum.de
Kontakt: stefan.pechmann@tum.de